An IEEE Single Precision Floating Point Arithmetic-Based Apodization Architecture for Portable Ultrasound Imaging System

• Published in: IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2019-06, Vol.66 (6), p.2275-2287
• Main Authors: Agarwal, Mayur, De, Arijit, Banerjee, Swapna
• Format: Article
• Language: English
• Subjects: Adaptive algorithms; adaptive apodization; Adaptive systems; Apodization; Array signal processing; CMOS; Computer architecture; Computer simulation; Diagnostic systems; Field II; Floating point arithmetic; IEEE single precision floating point format; Image contrast; Image enhancement; Imaging; Mathematical analysis; Medical imaging; Microsoft Windows; normalized cross-correlation; point-of-care; Portable; Power consumption; Spatial resolution; Ultrasonic imaging
• ISSN: 1549-8328; 1558-0806
• DOI: 10.1109/TCSI.2019.2892459

Portable ultrasound systems are useful in point-of-care diagnostic. Improving the image contrast and spatial resolution over a large range of imaging depths while maintaining the minimum area and power are the desiderata in case of ultrasound systems. Adaptive apodization is used for obtaining high contrast and spatial resolution ultrasound images; however, the implementation of adaptive apodization in hardware consumes large area and power. In this paper, an adaptive algorithm is presented for obtaining good image contrast and resolution using low computational complexity. In the proposed apodization algorithm, minimum and maximum variance criteria and normalized cross-correlation are used to enhance the image contrast and spatial resolution over a large range of imaging depths. A resource optimized, IEEE single precision arithmetic-based architecture of the proposed method is also presented in this paper. Field II toolbox and the experimental data taken from the plane-wave imaging challenge in medical ultrasound are used for evaluating the performance of the proposed methods. Simulation and experimental results demonstrate that the proposed method provides better resolution coupled with the improved contrast performance than conventional dual apodization with cross-correlation methods. The architecture of the proposed method consumes 358.66-mW dynamic power and 1122.1 k NAND-2 equivalent gates are found to be in UMC 90-nm CMOS standard cell library. Implementation of the proposed method requires the calculation of inverse square root. A quadratic approximation-based inverse square root calculation method and its datapath to support IEEE single precision arithmetic are also presented. The datapath of the inverse square root calculator reduces the memory requirement up to 70% which need to be adopted in pursuit of higher performances.