A reliable model for the compensation loop of multistage amplifiers at high frequency

Purpose Multistage amplifiers require a reliable frequency compensation solution to remain stable in a closed-loop configuration. A frequency compensation scheme creates an inner negative feedback loop amongst different amplifying stages and shapes the frequency response such that an unconditionally...

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Bibliographic Details
Published in:Circuit world 2019-11, Vol.45 (4), p.268-278
Main Author: Aminzadeh, Hamed
Format: Article
Language:English
Subjects:
Amplifiers
CMOS
Compensation
Computer simulation
Feedback loops
Frequency response
Multistage
Negative feedback
Poles
Reliability analysis
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Summary:Purpose Multistage amplifiers require a reliable frequency compensation solution to remain stable in a closed-loop configuration. A frequency compensation scheme creates an inner negative feedback loop amongst different amplifying stages and shapes the frequency response such that an unconditionally stable single-pole amplifier results for closed-loop operation. The frequency compensation loop is thus responsible for the placement of the poles and zeros and the final stability of multistage amplifiers. An amplifier incorporating a sophisticated frequency compensation network cannot be, however, analyzed in the presence of a complex ac feedback loop. The purpose of this study is to provide a reliable model for the compensation loop of multistage amplifiers at the higher frequencies. Design/methodology/approach In this paper, the major part of the amplifier, including a two-port network comprising the compensation network, is characterized using a reliable feedback model. Findings The model integrates all the frequency-dependent components of the frequency compensation network, and it can evaluate the nondominant real or complex poles of an amplifier. Originality/value The reliability of the proposed model is verified through analysis of the frequency response of the amplifiers and by comparing the analytic results with the simulation results in standard CMOS process.
ISSN:0305-6120
1758-602X
DOI:10.1108/CW-03-2019-0021