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Mechanism on the modified sulfurization process for growing large-grained Cu2ZnSnS4 thin films

The growth of large CZTS grains running through the whole absorber layer without voids is realized by a modified sulfurization method. The solar cell with efficiency of 6.4% (active area) is fabricated. [Display omitted] •We develop a modified sulfurization method to grow CZTS large grains.•The sulf...

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Bibliographic Details
Published in:Solar energy 2020-01, Vol.196, p.597-606
Main Authors: Lu, Xiaoshuang, Xu, Bin, Ma, Chuanhe, Chen, Ye, Yang, Pingxiong, Chu, Junhao, Sun, Lin
Format: Article
Language:English
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Summary:The growth of large CZTS grains running through the whole absorber layer without voids is realized by a modified sulfurization method. The solar cell with efficiency of 6.4% (active area) is fabricated. [Display omitted] •We develop a modified sulfurization method to grow CZTS large grains.•The sulfurization mechanism on growing large CZTS grains is firstly elucidated.•The solar cell with efficiency of 5.8% (active area efficiency 6.4%) is fabricated.•Optimization for heterojunction interface is expected to further improve efficiency. A facile and effective sulfurization method is developed to grow the large-grained Cu2ZnSnS4 (CZTS) films. This method involves short duration of high temperature and adding SnS powder. The roles of SnS powder to promote the growth of CZTS large grains are comprehensively investigated. SnS can suppress the loss of Sn in CZTS precursor during the sulfurization process. More importantly, the reaction between SnS and S leads to the formation of SnS2 intermediate phase, which is a fluxing agent under high S atmosphere and more easily reacts with other secondary phases. Consequently, large grains of CZTS through the whole film thickness are successfully prepared with the help of SnS2. Furthermore, the CZTS solar cell with efficiency of 5.8% (active area efficiency 6.4%) without MgF2 anti-reflection coating is fabricated. The severe carrier recombination within the heterojunction interface is the major factor limiting device efficiency. The optimization for the heterojunction interface is expected to further improve efficiency.
ISSN:0038-092X
1471-1257
DOI:10.1016/j.solener.2019.12.063