Accelerator-aware Neural Network Design using AutoML

While neural network hardware accelerators provide a substantial amount of raw compute throughput, the models deployed on them must be co-designed for the underlying hardware architecture to obtain the optimal system performance. We present a class of computer vision models designed using hardware-a...

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Bibliographic Details
Published in:arXiv.org 2020-03
Main Authors: Gupta, Suyog, Akin, Berkin
Format: Article
Language:English
Subjects:
Accelerators
Computer vision
Data centers
Hardware
Image classification
Model accuracy
Network design
Neural networks
Search engines
Online Access:Get full text
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Summary:While neural network hardware accelerators provide a substantial amount of raw compute throughput, the models deployed on them must be co-designed for the underlying hardware architecture to obtain the optimal system performance. We present a class of computer vision models designed using hardware-aware neural architecture search and customized to run on the Edge TPU, Google's neural network hardware accelerator for low-power, edge devices. For the Edge TPU in Coral devices, these models enable real-time image classification performance while achieving accuracy typically seen only with larger, compute-heavy models running in data centers. On Pixel 4's Edge TPU, these models improve the accuracy-latency tradeoff over existing SoTA mobile models.
ISSN:2331-8422