Securing Hardware Accelerators Using Multi-Key Based Structural Obfuscation

A hardware accelerator is a pivotal component of a system-on-chip (SoC) employed in modern electronic systems. However, the design of hardware accelerators can be infected by inserting malicious logic (hardware Trojan) through reverse engineering (RE) by an adversary. Rising threats of RE and Trojan...

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Bibliographic Details
Published in:IEEE letters of the Computer Society 2020-01, Vol.3 (1), p.21-24
Main Authors: Sengupta, Anirban, Rathor, Mahendra, Patil, Somesh, Harishchandra, Naukudkar Gaurav
Format: Article
Language:English
Subjects:
Accelerators
Electronic systems
Finite impulse response filters
Hardware
Hardware accelerator
key-based structural obfuscation
Logic gates
Malware
Partitioning algorithms
Reverse engineering
Security
System on chip
Trojan horses
Vegetation
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Summary:A hardware accelerator is a pivotal component of a system-on-chip (SoC) employed in modern electronic systems. However, the design of hardware accelerators can be infected by inserting malicious logic (hardware Trojan) through reverse engineering (RE) by an adversary. Rising threats of RE and Trojan necessitates the security of hardware accelerator based SoCs. The proposed methodology secures the hardware accelerators using a novel structural obfuscation using key-driven transformation techniques such as key-based loop unrolling, key-based partitioning, key-based redundant operation elimination and key-based tree height transformation, which makes the design unobvious (non-interpretable) to an attacker. The results of the proposed approach on DSP hardware accelerators indicated 2.3× enhancement in strength of obfuscation (at gate level) compared to a recent approach (indicating enhanced security), at nominal design cost.
ISSN:2573-9689
2573-9697
DOI:10.1109/LOCS.2020.2984747