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Theoretical Analysis of Multi Integrating RX Front-Ends for Lossy Broad-Band Channels

Recent advances in wire-like communication channels without a physical wire has seen the emergence of wireline-like broadband channels but with atypical high loss. Communication links using such channels (e.g., Proximity Communication, Human Body Communication) are typically broadband, like wireline...

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Bibliographic Details
Published in:IEEE open journal of circuits and systems 2021, Vol.2, p.363-379
Main Authors: Roy Chowdhury, Antroy, Maity, Shovan, Sen, Shreyas
Format: Article
Language:English
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Summary:Recent advances in wire-like communication channels without a physical wire has seen the emergence of wireline-like broadband channels but with atypical high loss. Communication links using such channels (e.g., Proximity Communication, Human Body Communication) are typically broadband, like wireline systems but noise-limited like wireless systems. Hence, employing broad-band communication through such emerging channels calls for new research on analyzing, designing and finding the theoretical limits for receiver topologies suitable for lossy broad-band channels . In this paper, we present a theoretical analysis framework for various broadband receivers in combination with low-noise amplifiers and proposed multi-integrator cascade, which provides significant gain with relatively lower power consumption than the standard gain elements. Through 1) derivation of new noise analysis of integrating-sampling receivers, 2) proposal of a new circuit topology (multi-integrating receiver, MIR) and 3) development of a thorough design space exploration framework, including use of a combination of wireless-inspired Low-noise amplifiers (LNA) with wireline-inspired strong-ARM latches, and the newly proposed MIRs, this paper demonstrates the optimum design choices for some common scenarios. Maximum achievable data rate and optimum energy-efficiency for various channel losses have been obtained theoretically for different topologies revealing their advantages and limitations, intended to serve as a guide for future receiver designs for lossy broad-band channels . All the circuits have been designed in 65 nm CMOS process with a 1 V supply voltage.
ISSN:2644-1225
2644-1225
DOI:10.1109/OJCAS.2021.3078176