Strained Silicon-on-Insulator Platform for Co-Integration of Logic and RF-Part II: Comb-Like Device Architecture

• Published in: IEEE transactions on electron devices 2022-04, Vol.69 (4), p.1769-1775
• Main Authors: Liang, Jie, Sun, Chen, Xu, Haiwen, Kong, Eugene Y.-J., Nguyen, Bich-Yen, Schwarzenbach, Walter, Maleville, Christophe, Berthelon, Remy, Weber, Olivier, Arnaud, Franck, Thean, Aaron V.-Y., Gong, Xiao
• Format: Article
• Language: English
• Subjects: 5G RF application; comb-like device structure; Compressive properties; Computational modeling; Computer architecture; Electron mobility; Field effect transistors; FinFETs; Logic gates; Performance evaluation; Radio frequency; Semiconductor devices; Silicon; SOI (semiconductors); Strain relaxation; strained silicon-on-insulator (SSOI); Substrates; tensile-strained nFETs
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2022.3154311

In the first part of this two-part article, implant-induced strain relaxation has been successfully demonstrated on a common strained silicon-on-insulator (SSOI) platform. In this second part, based on an SSOI platform that could enable the cointegration of highly tensile-strained Si n-channel field-effect transistors (nFETs) and compressive-strained SiGe p-channel FETs (pFETs) on the same substrate for both logic and 5G RF circuits, we here propose a comb-like device structure within the strained SOI platform for further improvement in the electrostatic, dc, and RF performances over the unstrained SOI FinFETs counterpart. It is demonstrated that the peak {G}_{\text {m}} of strained comb-like Si nFETs can be improved by 35% over unstrained n-type FinFETs SOI. The improvements of {f}_{\text {T}} by 22% and {f}_{\text {max}} by 36% over no-comb devices are also observed. Furthermore, the linearity of {f}_{\text {T}} and {f}_{\text {max}} has been greatly improved by introducing forward body biasing on the comb-like device structure.