Low-Energy Shared-Current Write Schemes for Voltage-Controlled Spin-Orbit-Torque Memory

Voltage-controlled (VC) spin-orbit-torque (SOT) magnetic random access memory (MRAM) is being considered as the next-generation magnetic memory with potential to achieve superior speed, power, and write error rates over existing MRAM technologies. By placing multiple VC devices on a single SOT bus,...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2023-02, Vol.70 (2), p.478-484
Main Authors: Lee, Albert, Alam, Irina, Yang, Jiyue, Wu, Di, Pamarti, Sudhakar, Gupta, Puneet, Wang, Kang L.
Format: Article
Language:English
Subjects:
Electric potential
Magnetic separation
Magnetic tunneling
Magnetic tunneling junctions (MTJs)
Magnetomechanical effects
Perpendicular magnetic anisotropy
Random access memory
shared-current write
spin orbit torque (SOT)
Switches
Torque
Voltage
Voltage control
voltage controlled magnetic anisotropy (VCMA)
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Summary:Voltage-controlled (VC) spin-orbit-torque (SOT) magnetic random access memory (MRAM) is being considered as the next-generation magnetic memory with potential to achieve superior speed, power, and write error rates over existing MRAM technologies. By placing multiple VC devices on a single SOT bus, VC-SOT MRAM can also enable compact structures, in which multiple devices can be addressed individually yet programmed via a shared current. In this work, we propose two implementations of shared-current write: the horizontal shared current write (HSCW), which reduces the average SOT current per bit by the number of bits on the SOT bus, and the vertical shared current write (VSCW), which can further leverage data dependency for increased performance. We simulate the efficiency of the HSCW and VSCW using a Landau-Lifshitz-Gilbert (LLG)-based VC-SOT model and a 28-nm CMOS technology and show that HSCW and VSCW can achieve an energy saving of 74% and 40%-87%, respectively, in a 32-bit setting. Analysis of data patterns in common workloads finds that 40% of data share more than 85% common bits, for which VSCW can leverage for further improved performance.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2022.3228831