A Weighted-Bin Difference Method for Issue Site Identification in Analog and Mixed-Signal Multi-Site Testing

• Published in: Journal of electronic testing 2023-02, Vol.39 (1), p.57-69
• Main Authors: Bruce, Isaac, Farayola, Praise O., Chaganti, Shravan K., Sheikh, Abalhassan, Ravi, Srivaths, Chen, Degang
• Format: Article
• Language: English
• Subjects: Algorithms; Automation; CAE) and Design; Circuits and Systems; Computer-Aided Engineering (CAD; Costs; Electrical Engineering; Engineering; Inspection; Methods; Semiconductors; Statistical methods; Testing time; Upper bounds
• ISSN: 0923-8174; 1573-0727
• DOI: 10.1007/s10836-023-06047-w

Higher complexity in recent chip designs, module integration, and increasing test quality requirements have expanded measurement needs and further increased chip test costs. Multi-site testing (parallel measurement) solves this issue by taking test measurements from multiple chips simultaneously, massively increasing throughput, and significantly reducing the test time per chip. Massive multi-site testing system, a setup with significant measurement site count, further improves throughput and maximizes gains. However, it unavoidably amplifies site-to-site variations in the measured specifications. This problem is particularly magnified in analog and mixed-signal chips. Some measurement sites now exhibit pronounced induced errors, and their measurements no longer reflect the actual performance of the device under test (DUT). This problem presents a solid need to identify sites that suffer from extreme site-to-site variations (issue sites). We propose an automated method to investigate site-to-site variations in volume multi-site data and identify issue sites that may not be obvious via human inspection or basic statistical methods. Assuming that all measurement sites have the same accuracy and precision, we consider an issue site to be one whose weighted-bin difference score is greater than an analytically derived upper bound. We apply the proposed method to simulation data and volume test data obtained from an industrial analog and mixed-signal system on chips (SoCs) that were tested using multi-site testing hardware and show that the technique can effectively identify issue sites in the testing system. We compare the proposed algorithm to existing methods and demonstrate its superior performance.