A Survey of Algorithmic and Hardware Optimization Techniques for Vision Convolutional Neural Networks on FPGAs

In today’s world, the applications of convolutional neural networks (CNN) are limitless and are employed in numerous fields. The CNNs get wider and deeper to achieve near-human accuracy. Implementing such networks on resource constrained hardware is a cumbersome task. CNNs need to be optimized both...

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Bibliographic Details
Published in:Neural processing letters 2021-06, Vol.53 (3), p.2331-2377
Main Authors: Sateesan, Arish, Sinha, Sharad, K. G., Smitha, Vinod, A. P.
Format: Article
Language:English
Subjects:
Accuracy
Algorithms
Architecture
Artificial Intelligence
Artificial neural networks
Automation
Back propagation
Co-design
Complex Systems
Computational Intelligence
Computer Science
Datasets
Field programmable gate arrays
Hardware
Information storage
Neural networks
Optimization
Optimization techniques
Regularization methods
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Summary:In today’s world, the applications of convolutional neural networks (CNN) are limitless and are employed in numerous fields. The CNNs get wider and deeper to achieve near-human accuracy. Implementing such networks on resource constrained hardware is a cumbersome task. CNNs need to be optimized both on hardware and algorithmic levels to compress and fit into resource limited devices. This survey aims to investigate different optimization techniques of Vision CNNs, both on algorithmic and hardware level, which would help in efficient hardware implementation, especially for FPGAs.
ISSN:1370-4621
1573-773X
DOI:10.1007/s11063-021-10458-1