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A 25-kHz-BW 97.4-dB-SNDR SAR-Assisted Continuous-Time 1-0 MASH Delta-Sigma Modulator With Digital Noise Coupling
This article introduces a high-resolution continuous-time delta-sigma modulator (CT DSM) architecture that incorporates a successive approximation register (SAR)-assisted digital noise coupling (DNC) technique and a multi-stage noise-shaping (MASH) structure. The limited maximum stable amplitude (MS...
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Published in: | IEEE journal of solid-state circuits 2024-10, Vol.59 (10), p.3232-3241 |
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Main Authors: | , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites |
Online Access: | Get full text |
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Summary: | This article introduces a high-resolution continuous-time delta-sigma modulator (CT DSM) architecture that incorporates a successive approximation register (SAR)-assisted digital noise coupling (DNC) technique and a multi-stage noise-shaping (MASH) structure. The limited maximum stable amplitude (MSA) problem due to the high-order-shaped large quantization error ( E {_{\mathrm{ 1}}} ) in the previous single-loop DNC DSM is alleviated by adopting an M-0 MASH architecture, where E {_{\mathrm{ 1}}} is low-order shaped within the first stage. With a zeroth-order second stage and digital cancellation filter, only the second-stage quantization error ( E {_{\mathrm{ 2}}} ) is present in the final output, where it is shaped aggressively by the conjunction of the first-stage noise-transfer function (NTF) and DNC. Fabricated in 28-nm CMOS, the prototype demonstrates that a high-order CT DSM can be realized with low-order analog loop filters through the combination of MASH and DNC architecture, achieving peak values of signal-to-noise and distortion ratio (SNDR), signal-to-noise ratio (SNR), and dynamic range (DR) of 97.4, 98.4, and 100.2 dB, respectively, in a 25-kHz bandwidth while consuming only 260 ~\mu \text{W} from a 1.1-V supply. The SNDR-based Schreier figure-of-merit (FoM) is 177.2 dB. |
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ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/JSSC.2024.3391902 |