Unbalanced Currents in Integrated Circuits and Their Effect on TEM Cell Emissions

• Published in: IEEE transactions on electromagnetic compatibility 2011-08, Vol.53 (3), p.600-610
• Main Authors: Kuifeng Hu, Haixiao Weng, Beetner, D. G., Pommerenke, D., Drewniak, J.
• Format: Article
• Language: English
• Subjects: Applied sciences; Boards; Chips; Couplings; Design. Technologies. Operation analysis. Testing; Electric power; Electrical engineering. Electrical power engineering; Electrical power engineering; Electricity generation; Electromagnetic compatibility; electromagnetic inductive interference; electromagnetic interference (EMI); Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; Electronics industry; Exact sciences and technology; Impedance; Inductance; Integrated circuit modeling; Integrated circuits; interconnect power systems; Miscellaneous; Networks; Packages; packaging; Pins; Power electronics, power supplies; Power networks and lines; Printed circuit boards; Printed circuits; Resistance; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; TEM cells; Transmission electron microscopy; transverse electromagnetic cell emissions
• ISSN: 0018-9375; 1558-187X
• DOI: 10.1109/TEMC.2011.2118214

Transverse ElectroMagnetic (TEM) cell measurements are often used to evaluate the potential of ICs to cause radiated emissions in printed circuit boards. These measurements are a function of the unbalanced current on package power pins, for example, where more current enters one side of an IC than another, and the displacement current caused by capacitive coupling from the power grid mesh to the septum of the TEM cell. The relationship between unbalanced currents and TEM cell measurements is derived in this paper. A distributed model of the on-die power delivery network is developed to show that unbalanced currents may be caused by an asymmetric power pin arrangement, by an imbalance in package impedance, or by an imbalance in the impedance of the on-die power delivery network. To validate results, the magnitude and phase of high-frequency power-pin currents were measured on a test chip. Experiments showed that results could be used to guide modifications to the chip's connection to the printed circuit board power structure to minimize unbalanced currents and, thus, to minimize TEM cell measurements.