A new digital readout integrated circuit (DROIC) with pixel parallel A/D conversion and reduced quantization noise

• Published in: Infrared physics & technology 2014-03, Vol.63, p.125-132
• Main Authors: Kayahan, Hüseyin, Yazici, Melik, Ceylan, Ömer, Gurbuz, Yasar
• Format: Article
• Language: English
• Subjects: Charge; Conversion; Digital; Digital readout integrated circuit (DROIC); Extended integration; Focal plane; Infrared; Noise; Pixel parallel ADC; Pixels; Pulse frequency modulation (PFM); Quantization; Quantization noise
• ISSN: 1350-4495; 1879-0275
• DOI: 10.1016/j.infrared.2013.12.013

•A new digital pixel design for IR detector arrays have been proposed.•Pixel design is based on PFM and extended integration.•2.33Ge− charge handling capacity and quantization noise of 161e− have been measured.•Very low figure of merit for power effectiveness 465 fJ/LSB reported.•Fast frame rates up to 400Hz can be achieved using the proposed digital pixel. This paper represents a novel digital readout for infrared focal plane arrays with 2.33Ge− charge handling capacity while achieving quantization noise of 161e−. Pixel level A/D conversion has been realized by pulse frequency modulation (PFM) technique supported with a novel method utilizing extended integration that eliminates the requirement for an additional column ADC. Digital pixel operates with two phases; the first phase is as ordinary PFM in charge domain and the second phase is in time domain, allowing the fine quantization and low quantization noise. A 32×32 prototype has been manufactured and tested. Measured peak SNR at half well fill is 71dB with significant SNR improvement for low illuminated pixels due to extremely low quantization noise. 32×32 ROIC dissipates only 1.1mW and the figure of merit for power dissipation is measured to be 465 fJ/LSB, compared to 930 fJ/LSB and 1470 fJ/LSB of the state of the art.