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Towards intrinsic charge transport in monolayer molybdenum disulfide by defect and interface engineering

Molybdenum disulfide is considered as one of the most promising two-dimensional semiconductors for electronic and optoelectronic device applications. So far, the charge transport in monolayer molybdenum disulfide is dominated by extrinsic factors such as charged impurities, structural defects and tr...

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Published in:Nature communications 2014-10, Vol.5 (1), p.5290-5290, Article 5290
Main Authors: Yu, Zhihao, Pan, Yiming, Shen, Yuting, Wang, Zilu, Ong, Zhun-Yong, Xu, Tao, Xin, Run, Pan, Lijia, Wang, Baigeng, Sun, Litao, Wang, Jinlan, Zhang, Gang, Zhang, Yong Wei, Shi, Yi, Wang, Xinran
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Language:English
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Summary:Molybdenum disulfide is considered as one of the most promising two-dimensional semiconductors for electronic and optoelectronic device applications. So far, the charge transport in monolayer molybdenum disulfide is dominated by extrinsic factors such as charged impurities, structural defects and traps, leading to much lower mobility than the intrinsic limit. Here we develop a facile low-temperature thiol chemistry route to repair the sulfur vacancies and improve the interface, resulting in significant reduction of the charged impurities and traps. High mobility >80 cm 2  V −1  s −1 is achieved in backgated monolayer molybdenum disulfide field-effect transistors at room temperature. Furthermore, we develop a theoretical model to quantitatively extract the key microscopic quantities that control the transistor performances, including the density of charged impurities, short-range defects and traps. Our combined experimental and theoretical study provides a clear path towards intrinsic charge transport in two-dimensional dichalcogenides for future high-performance device applications. Impurities in molybdenum disulfide are known to reduce charge mobility to below its intrinsic limit. Here, the authors demonstrate that impurities are associated with lattice defects and that a chemical route can repair sulfur vacancies and improve interface quality with a substrate, enhancing device performance.
ISSN:2041-1723
2041-1723
DOI:10.1038/ncomms6290