An on-wafer embedded passive device using chip-in-substrate packaging technology

• Published in: Microwave and optical technology letters 2015-09, Vol.57 (9), p.2060-2067
• Main Authors: Liang, Junge G., Kim, Eun Seong, Wang, Cong, Youn, Je-Hyun, Park, Min Chul, Kim, Nam Young
• Format: Article
• Language: English
• Subjects: capacitor; Capacitors; chip-in-substrate package; Circuits; diplexer; inductor; Inductors; Microwaves; Noise levels; on-wafer passive device; Packaging; Rejection; Three dimensional
• ISSN: 0895-2477; 1098-2760
• DOI: 10.1002/mop.29261

ABSTRACT In this article, a new packaging technology called chip‐in‐substrate packaging (CiSP) technology, which embeds passive components such as inductors and capacitors on silicon substrates, is arranged for a three‐dimensional structure. As the parasitic capacitance of the inductors and capacitors are increased by CiSP, a lower self‐resonance frequency compared with bare chips can be avoided using a printed circuit board with low thickness and low permittivity. To verify CiSP on the circuit level, a diplexer circuit is simulated from measured components and is composed of two series LC resonators to apply a GSM band (880–960 MHz) and a DCS band (1.71–1.88 GHz). An insertion loss of 0.76 dB at 0.96 GHz for GSM and 0.772 dB at 1.71 GHz for DCS are realized by CiSP technology. Moreover, the minimum rejections of 19.1 dB at 1.71 GHz for GSM and 20.8 dB at 0.96 GHz for DCS are realized with the maximum rejections for the DCS and GSM bands of 37.6 and 33.7 dB, respectively. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:2060–2067, 2015