Loading…

Design of a DNA-based reversible arithmetic and logic unit

Owing to the emergence of better characteristics such as parallelism, low power consumption and data compactness, DNA computing has drawn great attention in recent years. In this study, the authors realise an arithmetic and logic unit (ALU) using deoxyribonucleic acid (DNA). Inputs and outputs of th...

Full description

Saved in:
Bibliographic Details
Published in:IET nanobiotechnology 2015-08, Vol.9 (4), p.226-238
Main Authors: Sarker, Ankur, Hasan Babu, Hafiz Md, Rashid, Sarker Md Mahbubur
Format: Article
Language:English
Subjects:
Citations: Items that this one cites
Items that cite this one
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Owing to the emergence of better characteristics such as parallelism, low power consumption and data compactness, DNA computing has drawn great attention in recent years. In this study, the authors realise an arithmetic and logic unit (ALU) using deoxyribonucleic acid (DNA). Inputs and outputs of the proposed ALU keep the logical reversibility in computation processes. The proposed ALU is capable of performing four logical (AND, OR, EX-OR and NOT) with three arithmetic (addition, subtraction and multiplication) operations. They use DNA-based multiplexer to carry out final output. Compared to silicon-based computation, the proposed ALU is faster and requires less space and power due to parallelism, replication properties, compactness and formation of DNA strands. However, compared to one existing DNA-based system, fewer signals are required in each step. Besides, another existing DNA-based ALU requires five complex biological steps to compute, whereas the proposed ALU requires three biological steps. Also, the time complexities of that existing system are O(mln2n) for addition and subtraction operations; O(m) for logical operations and O(m(ln2n)2) for multiplication operation, while the proposed system has O(1) for logical operations and O(n) for others; here n is the number of bits and m is the number of test tubes for operands.
ISSN:1751-8741
1751-875X
1751-875X
DOI:10.1049/iet-nbt.2014.0056