Evolutionary optimization of neural networks with heterogeneous computation: study and implementation

In the optimization of artificial neural networks (ANNs) via evolutionary algorithms and the implementation of the necessary training for the objective function, there is often a trade-off between efficiency and flexibility. Pure software solutions on general-purpose processors tend to be slow becau...

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Bibliographic Details
Published in:The Journal of supercomputing 2015-08, Vol.71 (8), p.2944-2962
Main Authors: Fe, Jorge D., Aliaga, Ramón J., Gadea-Gironés, Rafael
Format: Article
Language:English
Subjects:
Compilers
Computer Science
Evolutionary
Field programmable gate arrays
Genetic algorithms
Hardware
Interpreters
Mathematical models
Neural networks
Optimization
Platforms
Processor Architectures
Programming Languages
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Summary:In the optimization of artificial neural networks (ANNs) via evolutionary algorithms and the implementation of the necessary training for the objective function, there is often a trade-off between efficiency and flexibility. Pure software solutions on general-purpose processors tend to be slow because they do not take advantage of the inherent parallelism, whereas hardware realizations usually rely on optimizations that reduce the range of applicable network topologies, or they attempt to increase processing efficiency by means of low-precision data representation. This paper presents, first of all, a study that shows the need of heterogeneous platform (CPU–GPU–FPGA) to accelerate the optimization of ANNs using genetic algorithms and, secondly, an implementation of a platform based on embedded systems with hardware accelerators implemented in Field Pro-grammable Gate Array (FPGA). The implementation of the individuals on a remote low-cost Altera FPGA allowed us to obtain a 3x–4x acceleration compared with a 2.83 GHz Intel Xeon Quad-Core and 6x–7x compared with a 2.2 GHz AMD Opteron Quad-Core 2354.
ISSN:0920-8542
1573-0484
DOI:10.1007/s11227-015-1419-7