Numerical study of microbump failure in 3D microelectronic structures

Microbump failure in 3D microelectronic chip stacks is studied numerically using the finite element method. The microbump structure consists of a solder joint sandwiched between copper pads connected to through-silicon vias. The model system is subject to prescribed shear deformation, with possible...

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Bibliographic Details
Published in:Microelectronics and reliability 2016-06, Vol.61, p.48-55
Main Authors: Shen, Y.-L., Flores, G.C., Guthrie, J.
Format: Article
Language:English
Subjects:
3D microelectronics
Compressing
Failure
Finite element analysis
Fracture mechanics
Mathematical models
Microbump
Microelectronics
Shear
Solders
Three dimensional
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Summary:Microbump failure in 3D microelectronic chip stacks is studied numerically using the finite element method. The microbump structure consists of a solder joint sandwiched between copper pads connected to through-silicon vias. The model system is subject to prescribed shear deformation, with possible superimposed tension or compression. A ductile damage model for solder is implemented to investigate failure propensity and cracking pattern as affected by the loading mode and underfill material. Failure of the solder is found to be sensitive to the loading mode, with a superimposed tension or compression on shear easily changing the crack path and tending to reduce the solder ductility. •Microbump failure under shear loading was studied using finite element modeling.•Underfill between stacked chips was found to delay solder failure.•Ductility and failure path are sensitive to superimposed tension/compression.
ISSN:0026-2714
1872-941X
DOI:10.1016/j.microrel.2016.01.004