Synaptic Device Network Architecture with Feature Extraction for Unsupervised Image Classification

For the efficient recognition and classification of numerous images, neuroinspired deep learning algorithms have demonstrated their substantial performance. Nevertheless, current deep learning algorithms that are performed on von Neumann machines face significant limitations due to their inherent in...

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Bibliographic Details
Published in:Small (Weinheim an der Bergstrasse, Germany) Germany), 2018-08, Vol.14 (32), p.e1800521-n/a
Main Authors: Kim, Sungho, Choi, Bongsik, Lim, Meehyun, Kim, Yeamin, Kim, Hee‐Dong, Choi, Sung‐Jin
Format: Article
Language:English
Subjects:
Algorithms
Artificial neural networks
carbon nanotubes
Computer architecture
Computer simulation
Digits
Energy consumption
Feature extraction
Handwriting
Handwriting recognition
Image classification
Machine learning
Nanotechnology
Neural networks
neuromorphic systems
Object recognition
Pattern recognition
recognition rates
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Summary:For the efficient recognition and classification of numerous images, neuroinspired deep learning algorithms have demonstrated their substantial performance. Nevertheless, current deep learning algorithms that are performed on von Neumann machines face significant limitations due to their inherent inefficient energy consumption. Thus, alternative approaches (i.e., neuromorphic systems) are expected to provide more energy‐efficient computing units. However, the implementation of the neuromorphic system is still challenging due to the uncertain impacts of synaptic device specifications on system performance. Moreover, only few studies are reported how to implement feature extraction algorithms on the neuromorphic system. Here, a synaptic device network architecture with a feature extraction algorithm inspired by the convolutional neural network is demonstrated. Its pattern recognition efficacy is validated using a device‐to‐system level simulation. The network can classify handwritten digits at up to a 90% recognition rate despite using fewer synaptic devices than the architecture without feature extraction. A synaptic device network architecture with a feature extraction algorithm is demonstrated inspired by convolution neural network architectures. Its pattern recognition efficacy is validated using a device‐to‐system level simulation. The network can classify handwritten digits at up to a 90% recognition rate despite using fewer synaptic devices than the architecture without feature extraction.
ISSN:1613-6810
1613-6829
DOI:10.1002/smll.201800521