Loading…
All‐van‐der‐Waals Barrier‐Free Contacts for High‐Mobility Transistors
Ultrathin 2D semiconductor devices are considered to have beyond‐silicon potential but are severely troubled by the high Schottky barriers of the metal–semiconductor contacts, especially for p‐type semiconductors. Due to the severe Fermi‐level pinning effect and the lack of conventional semimetals w...
Saved in:
Published in: | Advanced materials (Weinheim) 2022-08, Vol.34 (34), p.e2109521-n/a |
---|---|
Main Authors: | , , , , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Summary: | Ultrathin 2D semiconductor devices are considered to have beyond‐silicon potential but are severely troubled by the high Schottky barriers of the metal–semiconductor contacts, especially for p‐type semiconductors. Due to the severe Fermi‐level pinning effect and the lack of conventional semimetals with high work functions, their Schottky hole barriers are hardly removed. Here, an all‐van‐der‐Waals barrier‐free hole contact between p‐type tellurene semiconductor and layered 1T′‐WS2 semimetal is reported, which achieves a zero Schottky barrier height of 3 ± 9 meV and a high field‐effect mobility of ≈1304 cm2 V–1 s–1. The formation of such contacts can be attributed to the higher work function of ≈4.95 eV of the 1T′‐WS2 semimetal, which is in sharp contrast with low work function (4.1–4.7 eV) of conventional semimetals. The study defines an available strategy for eliminating the Schottky barrier of metal–semiconductor contacts, facilitating 2D‐semiconductor‐based electronics and optoelectronics to extend Moore's law.
An all‐van‐der‐Waals (vdW) barrier‐free metal–semiconductor contact is realized by using vdW semimetals to replace conventional metals, which can avoid the pinning effect of the Fermi levels and surface dangling bonds of conventional metal electrodes. Such a strategy can effectively reduce the contact resistance and enable record‐setting performance metrics of 2D semiconductor transistors. |
---|---|
ISSN: | 0935-9648 1521-4095 |
DOI: | 10.1002/adma.202109521 |