Grain engineering for improved charge carrier transport in two-dimensional lead-free perovskite field-effect transistors

• Published in: Materials horizons 2022-10, Vol.9 (1), p.2633-2643
• Main Authors: Wang, Shuanglong, Frisch, Sabine, Zhang, Heng, Yildiz, Okan, Mandal, Mukunda, Ugur, Naz, Jeong, Beomjin, Ramanan, Charusheela, Andrienko, Denis, Wang, Hai I, Bonn, Mischa, Blom, Paul W. M, Kivala, Milan, Pisula, Wojciech, Marszalek, Tomasz
• Format: Article
• Language: English
• Subjects: Carrier mobility; Carrier transport; Crystal growth; Crystallization; Current carriers; Field effect transistors; Grain boundaries; Grain size; Hole mobility; Lead free; Perovskites; Semiconductor devices; Threshold voltage
• ISSN: 2051-6347; 2051-6355
• DOI: 10.1039/d2mh00632d

Controlling crystal growth and reducing the number of grain boundaries are crucial to maximize the charge carrier transport in organic-inorganic perovskite field-effect transistors (FETs). Herein, the crystallization and growth kinetics of a Sn( ii )-based 2D perovskite, using 2-thiopheneethylammonium (TEA) as the organic cation spacer, were effectively regulated by the hot-casting method. With increasing crystalline grain size, the local charge carrier mobility is found to increase moderately from 13 cm 2 V −1 s −1 to 16 cm 2 V −1 s −1 , as inferred from terahertz (THz) spectroscopy. In contrast, the FET operation parameters, including mobility, threshold voltage, hysteresis, and subthreshold swing, improve substantially with larger grain size. The optimized 2D (TEA) 2 SnI 4 transistor exhibits hole mobility of up to 0.34 cm 2 V −1 s −1 at 295 K and a higher value of 1.8 cm 2 V −1 s −1 at 100 K. Our work provides an important insight into the grain engineering of 2D perovskites for high-performance FETs. Controlling crystal growth and reducing the number of grain boundaries are crucial to maximize the charge carrier transport in organic-inorganic perovskite field-effect transistors (FETs).