Epitaxial Si-based tunnel diodes

• Published in: Thin solid films 2000-12, Vol.380 (1), p.145-150
• Main Authors: Thompson, P.E, Hobart, K.D, Twigg, M.E, Rommel, S.L, Jin, N, Berger, P.R, Lake, R, Seabaugh, A.C, Chi, P.H, Simons, D.S
• Format: Article
• Language: English
• Subjects: Applied sciences; Delta doping; Diodes; Electronics; Epitaxy; Exact sciences and technology; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicon; Silicon–germanium; Tunnel diodes
• ISSN: 0040-6090; 1879-2731
• DOI: 10.1016/S0040-6090(00)01490-5

Tunneling devices in combination with transistors offer a way to extend the performance of existing technologies by increasing circuit speed and decreasing static power dissipation. We have investigated Si-based tunnel diodes grown using molecular beam epitaxy (MBE). The basic structure is a p + layer formed by B delta doping, an undoped spacer layer, and an n + layer formed by Sb delta doping. In the n-on-p configuration, low temperature epitaxy (300–370°C) was used to minimize the effect of dopant segregation and diffusion. In the p-on-n configuration, a combination of growth temperatures from 320 to 550°C was used to exploit the Sb segregation to obtain a low Sb concentration in the B-doped layer. Post-growth rapid thermal anneals for 1 min in the temperature interval between 600 and 825°C were required to optimize the device characteristics. J p, the peak current density, and the peak-to-valley current ratio (PVCR), were measured at room temperature. An n-on-p diode having a spacer layer composed of 4 nm Si 0.6Ge 0.4, bounded on either side by 1 nm Si, had a J p=2.3 kA/cm 2 and PVCR=2.05. A p-on-n tunnel diode with an 8 nm Si spacer (5 nm grown at 320°C, 3 nm grown at 550°C) had a J p=2.6 kA/cm 2 and PVCR=1.7.