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A simplified model of the reflow soldering process

Previous models of temperature development during the reflow soldering process have typically used commercially available, general purpose, finite difference finite element modelling tools to create detailed three dimensional representations of both the product and of the reflow furnace. Such models...

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Bibliographic Details
Published in:Soldering & surface mount technology 2002-01, Vol.14 (1), p.30-37
Main Authors: Whalley, David C, Hyslop, Stuart M
Format: Article
Language:English
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Summary:Previous models of temperature development during the reflow soldering process have typically used commercially available, general purpose, finite difference finite element modelling tools to create detailed three dimensional representations of both the product and of the reflow furnace. Such models have been shown to achieve a high degree of accuracy in predicting the temperatures a particular PCB design will achieve during the reflow process, but are complex to generate and analysis times are long, even when using modern high performance computer workstations.This paper will report on the development of a simplified model of the process, which uses less complex representations of both the product and the process, together with a simple numerical solver developed specifically for this application, whilst achieving an accuracy comparable with more detailed models. In the simplified model, the product is divided into elements, which are represented using a two-dimensional mesh of thermal conductances linking thermal masses. The values of these conductances and masses are calculated based on the averaged properties of the PCB material and attached components within the area of each of the elements. The representation of the specific reflow furnace is based on measurements of the temperature and level of thermal convection at each point along the length of the furnace, thereby avoiding the necessity of making detailed measurements of the furnace geometry and air flow velocities. The combination of these two simplification techniques allow the reduction of analysis time for a relatively simple PCB from in the order of an hour on a high performance Unix workstation to under a second on a Pentium class PC running Microsoft Windows.
ISSN:0954-0911
1758-6836
DOI:10.1108/09540910210416440