Concurrent Error Detection in a Polynomial Basis Multiplier over GF(2m)

Eliminating cryptographic computation errors is vital for preventing attacks. A simple approach is to verify the correctness of the cipher before outputting it. The multiplication is the most significant arithmetic operation among the cryptographic computations. Hence, a multiplier with concurrent e...

Full description

Saved in:
Bibliographic Details
Published in:Journal of electronic testing 2006-04, Vol.22 (2), p.143-150
Main Authors: Lee, Chiou-Yng, Chiou, Che Wun, Lin, Jim-Min
Format: Article
Language:English
Subjects:
Error correction & detection
Studies
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Eliminating cryptographic computation errors is vital for preventing attacks. A simple approach is to verify the correctness of the cipher before outputting it. The multiplication is the most significant arithmetic operation among the cryptographic computations. Hence, a multiplier with concurrent error detection ability is urgently necessary to avert attacks. Employing the re-computing shifted operand concept, this study presents a semi-systolic array polynomial basis multiplier with concurrent error detection with minimal area overhead. Moreover, the proposed multiplier requires only two extra clock cycles while traditional multipliers using XOR trees consume at least (ProQuest: Formulae and/or non-USASCII text omitted; see image) extra XOR gate delays in GF(2^sup m^) fields.[PUBLICATION ABSTRACT]
ISSN:0923-8174
1573-0727
DOI:10.1007/s10836-006-7446-9