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CONCURRENT BIST SYNTHESIS AND TEST SCHEDULING USING GENETIC ALGORITHMS
This paper presents an efficient method for concurrent built-in self-test synthesis and test scheduling in high-level synthesis. The method maximizes concurrent testing of modules while performing the allocation of functional units, test registers, and interconnects. The method is based on a genetic...
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Published in: | International journal of computers & applications 2007, Vol.29 (2), p.132-142 |
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Main Authors: | , |
Format: | Article |
Language: | English |
Citations: | Items that this one cites |
Online Access: | Get full text |
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Summary: | This paper presents an efficient method for concurrent built-in self-test synthesis and test scheduling in high-level synthesis. The method maximizes concurrent testing of modules while performing the allocation of functional units, test registers, and interconnects. The method is based on a genetic algorithm that efficiently explores the testable design space and finds a sub-optimal test registers assignment for each k-test session. The method was implemented using C++ on a Linux workstation. Several benchmark examples have been implemented and favorable design comparisons are reported. |
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ISSN: | 1925-7074 1206-212X |
DOI: | 10.2316/Journal.202.2007.2.202-1774 |