WBTK: a New Set of Microbenchmarks to Explore Memory System Performance for Scientific Computing

Memory hierarchies are a key component in obtaining high performance on modern microprocessors. To satisfy the ever-increasing demand on data rate access, they are also becoming increasingly complex: multilevel caches, non-blocking caches, sophisticated instructions for supporting prefetch and cache...

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Bibliographic Details
Published in:The international journal of high performance computing applications 2004-07, Vol.18 (2), p.211-224
Main Authors: Jalby, W., Lemuet, C., Le Pasteur, X.
Format: Article
Language:English
Subjects:
Benchmarks
Cache
Distributed shared memory
High performance computing
Optimization
Studies
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Summary:Memory hierarchies are a key component in obtaining high performance on modern microprocessors. To satisfy the ever-increasing demand on data rate access, they are also becoming increasingly complex: multilevel caches, non-blocking caches, sophisticated instructions for supporting prefetch and cache control, etc. If all of these advanced features promise to offer large performance gains, they also generate in some cases performance “anomalies” (i.e. bad performance triggered by specific code patterns). For precisely locating and understanding these anomalies, a new set of microbenchmarks called WBTK is introduced. We show through systematic experimentation on Alpha 21264, Power4 and Itanium1 that this microbenchmark first allowed us to detect most of the anomalies encountered on simple BLAS1 type codes. Secondly, it led us to demonstrate that vectorization of memory access was an efficient workaround for most of these anomalies.
ISSN:1094-3420
1741-2846
DOI:10.1177/1094342004038945