Issues and strategies for the physical design of system-on-a-chip ASICs

The density and performance of advanced silicon technologies have made system-on-a chip ASICs possible. SoCs bring together a diverse set of functions and technology features on a single die of enormous complexity. The physical design of these complex ASICs requires a rich set of functional elements...

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Bibliographic Details
Published in:IBM journal of research and development 2002-11, Vol.46 (6), p.661-674
Main Authors: Bednar, T R, Buffet, P H, Darden, R J, Gould, S W, Zuchowski, P S
Format: Article
Language:English
Subjects:
Architecture
Custom design
Integrated circuits
Intellectual property
Libraries
Logic
Packaging
Semiconductors
Silicon
Software
Transistors
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Summary:The density and performance of advanced silicon technologies have made system-on-a chip ASICs possible. SoCs bring together a diverse set of functions and technology features on a single die of enormous complexity. The physical design of these complex ASICs requires a rich set of functional elements that integrate efficiently with a set of design flows and tools productive enough to meet product requirements successfully, without consuming more time or design resources than a simpler design. The architecture described, including functional libraries and physical design conventions, enables the creation of multiple SoC ASIC designs from a common infrastructure that addresses silicon integration, electrical robustness, and packaging challenges. An implementation strategy follows from this design infrastructure that includes hierarchical design concepts, placement, routing, and verification processes.
ISSN:0018-8646
0018-8646
2151-8556
DOI:10.1147/rd.466.0661