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A testing system for implantable cardioverter defibrillators
Implantable cardioverter defibrillator (ICD) testing during the implantation process is important in order to avoid repeated induction of arrhythmias, which extends the implantation procedure and poses a risk to the patient. Hence, an in vitro testing system has been designed to assist optimal devic...
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Published in: | Journal of electrocardiology 1998, Vol.30, p.126-129 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites |
Online Access: | Get full text |
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Summary: | Implantable cardioverter defibrillator (ICD) testing during the implantation process is important in order to avoid repeated induction of arrhythmias, which extends the implantation procedure and poses a risk to the patient. Hence, an
in vitro testing system has been designed to assist optimal device programming and avoid repetitive inductions. The system includes a high-speed computer with A/D and D/A subsystems. Software has been designed to eliminate repeated arrhythmia induction by real-time capture and storage of the electrogram. Subsequently, the electrogram can be replayed into ICD software simulators at a variety of settings to determine candidate programming parameters. To validate the simulation system, signals were fed directly to an ICD via an attenuator. Output event markers were captured simultaneously with the signal into a digital file to assess the device performance. Four ventricular tachycardia (VT), three supraventricular tachycardia, (SVT), three atrial flutter (AFL), three atrial fibrillation (AF), and ten ventricular fibrillation (VF) passages were used to verify the system. Test settings were 110–160 beats/min for detection rate and 5 seconds for shock delay. The simulator and ICD detected the episodes for all passages at the 110 beats/min setting. For the setting of 160 beats/min, two VTs, two SVTs, three AFLs, and nine VFs were detected by the device, but no Afb triggered a shock. The simulator detection criteria were met by two VTs, two SVTs, three AFLs, ten VFs, and one AF. The mean detection time was 6,869–7,330 ms (110–160 beats/min) for the simulator and 7,840–8,170 ms for device. Comparison of results showed general agreement between simulator and device. Results demonstrated that device behavior at a variety of settings can be elucidated by the simulator for selection of optimal performance. The automated system can also function as a test bed for evaluation of new algorithms during device development and design |
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ISSN: | 0022-0736 1532-8430 |
DOI: | 10.1016/S0022-0736(98)80058-7 |