Total ionizing dose effects in elementary devices for 180-nm flash technologies

• Published in: Microelectronics and reliability 2011-08, Vol.51 (8), p.1295-1301
• Main Authors: Hu, Zhiyuan, Liu, Zhangli, Shao, Hua, Zhang, Zhengxuan, Ning, Bingxu, Chen, Ming, Bi, Dawei, Zou, Shichang
• Format: Article
• Language: English
• Subjects: Applied sciences; Asymmetry; Comparator circuits; Design. Technologies. Operation analysis. Testing; Devices; Drains; Electronics; Exact sciences and technology; Integrated circuits; Integrated circuits by function (including memories and processors); Ionizing radiation; Radiation tolerance; Semiconductor devices; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Transistors
• ISSN: 0026-2714; 1872-941X
• DOI: 10.1016/j.microrel.2011.03.026

The response of single flash cell in a 180-nm flash technology to total ionizing dose (TID) is studied. The results indicate that the erased cell flips at a dose level of 100 krad(Si), whereas the programmed cell does not even at the dose level up to 1 Mrad(Si). This asymmetric phenomenon is attributed to the difference between the reference current of the comparator circuit and the intrinsic current of the flash cell. For the first time, we show that the irradiation-induced flash cell drain-current variation does not saturate at the intrinsic value, i.e. the drain current of a device with neutrally charged floating gate. After degrading to the intrinsic state, the read current of the erased cell gradually increases while the programmed cell continues to increase and then slightly drops back. Radiation tolerance comparison of single flash cell, I/O transistors and high-voltage (HV) transistors demonstrates that HV NMOS is most susceptible to ionizing radiation. The radiation tolerance of the circuit level is also evaluated from the elementary devices.