Surface gate and contact alignment for buried, atomically precise scanning tunneling microscopy–patterned devices

• Published in: Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena Microelectronics and nanometer structures processing, measurement and phenomena, 2007-11, Vol.25 (6), p.2562-2567
• Main Authors: Fuechsle, Martin, Rueß, Frank J., Reusch, Thilo C. G., Mitic, Mladen, Simmons, Michelle Y.
• Format: Article
• Language: English
• ISSN: 1071-1023; 1520-8567
• DOI: 10.1116/1.2781512

The authors have developed a complete electron beam lithography (EBL)-based alignment scheme for making multiterminal Ohmic contacts and gates to buried, planar, phosphorus-doped nanostructures in silicon lithographically patterned by scanning tunneling microscopy (STM). By prepatterning a silicon substrate with EBL-defined, wet-etched registration markers, they are able to align macroscopic contacts to buried, conducting STM-patterned structures with an alignment accuracy of ∼ 100 nm . A key aspect of this alignment process is that, by combining a circular marker pattern with step engineering, they are able to reproducibly create atomically flat, step-free plateaus with a diameter of ∼ 300 nm so that the active region of the device can be patterned on a single atomic Si(100) plane at a precisely known position. To demonstrate the applicability of this registration strategy, they show low temperature magnetoresistance data from a 50 nm wide phosphorus-doped silicon nanowire that has been STM-patterned onto a single atomically flat terrace.