Low-Complexity Bit-Parallel Multiplier over GF(2m) Using Dual Basis Representation

Recently, cryptographic applications based on finite fields have attracted much attention. The most demanding finite field arithmetic operation is multiplication. This investigation proposes a new multiplication algorithm over GF(2m using the dual basis representation. Based on the proposed algorith...

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Bibliographic Details
Published in:Journal of computer science and technology 2006-11, Vol.21 (6), p.887-892
Main Authors: Lee, Chiou-Yng, Horng, Jenn-Shyong, Jou, I-Chang
Format: Article
Language:English
Subjects:
Algorithms
Complexity
Counting
Cryptography
Fields (mathematics)
Mathematical analysis
Multiplication
Multipliers
Polynomials
Representations
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Summary:Recently, cryptographic applications based on finite fields have attracted much attention. The most demanding finite field arithmetic operation is multiplication. This investigation proposes a new multiplication algorithm over GF(2m using the dual basis representation. Based on the proposed algorithm, a parallel-in parallel-out systolic multiplier is pesented. The architecture is optimized in order to minimize the silicon covered area (transistor count). The experimental results reveal that the proposed bit-parallel multiplier saves about 65% space complexity and 33% time complexity as compared to the traditional multipliers for a general polynomial and dual basis of GF(2m).
ISSN:1000-9000
1860-4749
DOI:10.1007/s11390-006-0887-x