Short-circuit current reduction techniques of the doubly-fed induction generator based wind turbines for fault ride through enhancement

• Published in: IET renewable power generation 2017-06, Vol.11 (7), p.1033-1040
• Main Authors: El-Naggar, Ahmed, Erlich, Istvàn
• Format: Article
• Language: English
• Subjects: asynchronous generators; close‐loop dynamic response; DFIG internal transient voltage; DFIG‐WTs; doubly‐fed induction generator based wind turbines; dynamic response; fault ride through enhancement; FRT; grid codes; grid voltage disturbances; machine side converter; manufacturer‐based simulation model; mean variance mapping optimisation; MSC; open‐loop dynamic response; optimisation; power convertors; power generation faults; power grids; power system transients; Research Article; rotor current magnitude; rotors; short‐circuit current reduction techniques; short‐circuit currents; transient impedance magnitude; wind power plants; wind turbines
• ISSN: 1752-1416; 1752-1424; 1752-1424
• DOI: 10.1049/iet-rpg.2016.0372

Grid voltage disturbances result in high magnitudes of rotor currents and DC-link voltage of the doubly-fed induction generator based wind turbines (DFIG-WTs), which may lead under severe fault conditions into deactivation of the machine side converter (MSC) and violation of the fault ride through (FRT) requirements of the grid codes. In this essence, several solutions were proposed, which vary between installing extra hardware components and control modification. However, the extra costs as well as the control limitations degrade the feasibility of the proposed solutions. In this study, new techniques are proposed to enhance the FRT through peak short-circuit current reduction of the DFIG-WT. The new techniques are developed based on the open-loop and close-loop dynamic response of the DFIG. The new techniques utilise the available MSC voltage, in order not to violate the voltage limits, to increase the rate of change of the DFIG internal transient voltage and to increase the magnitude of the transient impedance. Additionally, the mean variance mapping optimisation is used to optimally tune the gains in the second two techniques. The new techniques were implemented in a manufacturer-based simulation model, and the simulation results show their effectiveness, where the maximum peak current reduction achieved was 23.6%.