On the automated compilation of UML notation to a VLIW chip multiprocessor

With the availability of more and more cores within architectures the process of extracting implicit and explicit parallelism in applications to fully utilise these cores is becoming complex. Implicit parallelism extraction is performed through the inclusion of intelligent software and hardware sect...

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Bibliographic Details

Main Author:	David Stevens
Format:	Default Thesis
Published:	2013
Subjects:	Mechanical engineering not elsewhere classified Very long instruction word VLIW Unified modelling language UML Thread level parallelism Hardware threading Mechanical Engineering not elsewhere classified
Online Access:	https://hdl.handle.net/2134/13746
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